Large-capacity optical transmission systems have been put into practical use. Currently, a configuration in which data of about 100 Gbps are transmitted between nodes has been put into practical use. Furthermore, studies of a configuration in which data of 200 Gbps or 400 Gbps are transmitted between nodes have been carried out. An optical transmission system requires a very small bit error rate, and therefore, many optical transmission systems are equipped with a function for performing error correction using Forward Error Correction (FEC).
The error correction function is realized with a digital signal processor circuit. Here, the size of the forward error correction circuit (hereinafter, referred to as the FEC circuit) depends on the transmission capacity and the correction performance. For example, in order to perform error correction of a large-capacity signal, a large-scale FEC circuit is required. In addition, a large-scale FEC circuit is also required when performing a high-performance error correction.
In the existing optical transmission systems, multiple modulation schemes do not coexist, and in many cases, QPSK (Quadrature Phase Shift Keying) modulated optical signals are transmitted between nodes. However, along with increases in the capacity of optical transmission systems, studies have been carried out for introducing a modulation scheme in which the number of bits per symbol is large. For example, studies of a system in which 16QAM (Quadrature Amplitude Modulation) modulated optical signals or 64QAM modulated optical signals are transmitted between nodes have been carried out. Furthermore, there has been a demand for a configuration in which optical paths may be flexibly switched within an optical transmission system. Therefore, it is preferable that the FEC circuit also be capable of handling various transmission capacities and various transmission distances according to the communication application.
Note that error correction is described in Japanese Laid-open Patent Publication No. 2000-196467 or Japanese Laid-open Patent Publication No. 2010-41108, for example. In addition, a method for generating a modulated signal according to a communication scheme selected from a plurality of communication schemes is described in Japanese Laid-open Patent Publication No. 2011-250291, for example.
In order to handle various transmission capacities, the FEC circuit needs to be capable of processing the signal of the maximum possible transmission capacity. For example, in a case in which signals of 100 Gbps, 200 Gbps, and 400 Gbps may be transmitted, an FEC circuit that is capable of processing a 400 Gbps signal is required. In this case, the size of the FEC circuit becomes large. In addition, in order to cope with both a small-distance transmission system and a large-distance transmission system, the FEC circuit needs to be capable of processing a signal of the possible maximum transmission distance. In this case, since a high error-correction performance is required, the size of the FEC circuit becomes large.
However, when the error correction function is realized with a digital signal processor circuit, the FEC circuit occupies a very large proportion of the area in the digital signal processor circuit. That is, there is a limit to increasing the size of the FEC circuit. For this reason, it is preferable to suppress increases in the size of the FEC circuit, even when the transmission capacity becomes large.